Current Activities of CEERI's IC Design Group

CSIR Supra Institutional Project on "Technology for Smart Systems" involves activities related to:

Design of Pain Recognition Algorithm.
Design of Blocks for Image Processing Applications. Also, implementing FPGA-based design of 2-D DWT architecture.
Design of Mixed-signal Circuits for Sensors. Analog design of various building blocks is being done for exploration of different architectures and trade-offs.

Other groups within CEERI, Pilani and at the Chennai Centre are also undertaking activities under this supra project.

Special Manpower Development for VLSI Design and Related Software : Phase-II (SMDP2) has been sponsored by DIT/MCIT with the IC Design Group at CEERI, Pilani.

The project involves 32 institutes in total : 7 RCs and 25 PIs. The duration of the project is FIVE (5) years starting from April, 2005 upto March, 2010.

See SMDP-II for more details of the activities under this project.

See the official project website for more information.

DIT/MCIT have provided grant-in-aid for a R&D project on "Smart Camera." This project is being done jointly with EE Department of IIT-Delhi. This project started in June, 2007.

DIT/MCIT have provided grant-in-aid for a R&D project on "Mixed-signal design for Instrumentation Applications" starting October, 2008.

DIT/MCIT have provided grant-in-aid for a R&D project on Perception Engineering Applications under the "National Centres for Perception Engineering" project starting December, 2008.

Teaching and projects under the CEERI-BITS MoU continue as usual.

Teaching and laboratory activities under the MTech (Mechatronics) in association with BESU-Howrah, CSIO-Chandigarh and CMERI-Durgapur.

See the Group's academic teaching activities for more information.

Theses/projects with ME/MTech/MSc students from various academic institutes also continues as usual.

Contact Raj Singh for any suggestions or problems.

_{Updated : March 04, 2009

Created : July 25, 1997}