Report of Activities Under the MoU
CEERI, Pilani and IIT, Delhi
August, 1994 -- June, 1997
A Memorandum of Understanding (MoU) was signed between IIT Delhi and
CEERI, Pilani on 11th August, 1994. The scope of the MoU includes
the following activities in specified areas of co-operation :
- Joint Sponsored Research and Consultancy Projects
- Exchange/Deputation of Staff
- Joint Conference/Workshop/Courses
- Sharing of Facilities
- Student-Level Interactions/Training
- Ph.D. Registration
Following is the summary of the activities carried out under
the MoU from August, 1994 to June, 1997.
Academic Year 1994-95
Exchange/Deputation of Staff
- Dr. G. S. Visweswaran, Dr. B. Bhaumik and Sh. K. C. Sharma of IIT, Delhi
visited CEERI, Pilani for supervising the batch of 16 M.Tech students
of IIT, Delhi who were undergoing training in MOS IC Fabrication
Technology at CEERI and for research interaction.
- Dr. W. S. Khokle, Dr. B. Bhaumik, Dr. G. S. Visweswaran and Dr. Jayadeva
(of IIT, Delhi), Dr. Chandra Shekhar, Sh. Raj Singh and Dr. R. K. Garg
(of CEERI, Pilani) visited SCL, Chandigarh to discuss VLSI designs that
could be done jointly by CEERI, Pilani and IIT, Delhi and fabricated by
SCL.
- Prof. C. M. Bhatia of IIT, Delhi visited CEERI, Pilani to discuss the MA818 PWM
Generator Card for ASIC design jointly with CEERI.
- A team of students and faculty of IIT, Delhi came to CEERI on 24th and
25th March, 1995 to visit the Semiconductor Laboratory of CEERI, Pilani.
Sharing of Facilities
- A FSM Compiler and FSM-PLA synthesiser tool for 3 Micron CMOS library developed
by the CEERI's IC Design Group was given to IIT, Delhi.
- Information on CEERI's IC Design Group's CIF-to-PG tool was passed to IIT, Delhi.
- A fuzzy logic based prototype expert system developed by Sh. N. B. Singh
of CEERI was sent to IIT, Delhi for demonstration purpose and
exploration of commonality of interest.
Student-Level Training/Interaction
- A total of 16 M.Tech students of IIT, Delhi visited CEERI
for a 3-week training programme in MOS IC Fabrication Technology.
They were trained in NMOS fabrication process and associated
in-process measurements. They completed wafer processing for NMOS
transistors and capacitors during their training and conducted
measurements on fabricated devices.
- Besides the laboratory training, the IIT, Delhi students were also given
lectures by CEERI scientists on MOS IC fabrication unit processes and given exposure
to VLSI design through lectures and laboratory demonstrations.
- CEERI also proposed an enhanced scholarship scheme for such of the IIT, Delhi
M.Tech students who would undertake to work at CEERI (on projects of
mutual interest to CEERI and IIT, Delhi) for their M.Tech projects for
an enhanced duration of 1 year as opposed to normal 6 months.
Academic Year 1995-96
Joint Sponsored Project
- An AICTE sponsored joint project between IIT, Delhi and CEERI, Pilani
was started in the area of "PLC/SLC and PC-Based Intelligent
Distributed Data Acquisition and Control for Inter-disciplinary
Research and Training Leading to Industrial Automation".
Exchange/Deputation of Staff
- Dr. G. S. Visweswaran, Dr. B. Bhaumik and Sh. K. C. Sharma of IIT, Delhi
visited CEERI for supervising the training program of M.Tech students at CEERI
and also had technical exchanges on research topics and problems of
mutual interest.
- Dr. Chandra Shekhar, Sh. Raj Singh and Sh. O. P. Wadhawan of CEERI visited
IIT, Delhi for
joint formulation of a Microelectronics Partnership Scheme with industry
to be promoted through FITT of IIT, Delhi for rendering of specific training and
pre-competitive research exploration services to partner industies
who would commit specific financial resources for a 3-year partnership
in 3 different categories (with commensurate benefits).
- Prof. S. S. Murthy and Sh. V. K. Sharma of IIT, Delhi visited CEERI to plan joint
activities in the area of Switched Reluctance Motor Drives.
- Two visits from each side (by Sh. Rahul Verma and Prof. C. M. Bhatia)
were exchanged. In one of the visits, Sh. Rahul Verma gave a seminar to
PEEMD M.Tech students on "Power Electronics : Projects and Activities
at CEERI".
- Sh. Rahul Verma and Sh. Pukhraj Singh of CEERI visited IIT, Delhi for research
interaction in connection with the AICTE project.
- Additionally 3 person-visits from either side took place for
research interactions of mutual interest.
Sharing of Facilities
- Technical information available at IIT, Delhi on Tanner Tools was
provided to CEERI and the suitability of these tools for student-lab
was jointly examined --- including the kind of laboratory experiments
and student projects that can be planned around these tools.
- Information on various VLSI CAD tools being used at CEERI's IC Design
Group was given to IIT, Delhi.
Student-Level Training/Interaction
- 2 B.Tech students from IIT, Delhi came to CEERI for their summer-training
in the area of Microelectronics.
- 13 M.Tech students from IIT, Delhi underwent a 3-week MOS IC
Fabrication technology training at CEERI. These students were also
additionally given lectures on unit processes of MOS technology and
VLSI design topics by CEERI scientists.
Ph.D. Registration
- 2 scientists of CEERI (one each in the areas of Microelectronics and
Power Electronics) registered for their Ph.D. degree at IIT, Delhi.
Academic Year 1996-97
Exchange/Deputation of Staff
- Dr. M. Jagadesh Kumar of IIT, Delhi visited CEERI for supervising MOS IC
Fabrication Technology training for M.Tech students of IEC and VDTT
programmes of IIT, Delhi and for research interaction on topics of
mutual interest --- namely modeling and fabrication of power
semiconductor devices. Technical discussions were also held on Monte
Carlo simulations for semiconductor devices.
- Prof. C. M. Bhatia of IIT, Delhi visited CEERI for discussions on the joint AICTE
project and placement of M.Tech students at CEERI for summer training
and also for major student projects.
- Sh. V. K. Sharma (Research Fellow) from IIT, Delhi visited CEERI for a
period of 15 days in connection with the joint SRM drive development
programme.
- Sh. Vishal Verma (Research Fellow) from IIT, Delhi is on deputation to
CEERI for 6 months ({\em w.e.f} June, 1997) under the joint AICTE Project.
- Additionally 5 person-visits were exchanged for planning of the
Microelectronics Partnership programme with industry, and technical
exchange/material cllection.
- A 1-semester alternate week visit by Dr. Chandra Shekhar of CEERI to
IIT, Delhi for participation in course-teaching, project-supervision and research
interaction was mutually agreed and approved. The visit will start
w.e.f July 1997.
- 2 scientists from CEERI were on deputation at IIT, Delhi to pursue
their Ph.D. degree programmes. One of them, Mr. A. S. Mandal is pursuing
his Ph.D. work in the area of Microelectronics while the other, Mr.
Pukhraj Singh is pursuing his Ph.D. work in the area of Power Electronics.
Joint Conferences/Workshops
- A workshop on Design of VLSI Microprocessors was planned to be held at
CEERI in November, 1996. However, it could not be held at that time and
now will be held at a mutually convenient date in the academic year
1997-98.
Sharing of Facilities
- Facilities for assembly and fabrication of 3-phase IGBT based active
filter for STATCON project were extended to IIT, Delhi by CEERI.
The STATCON project is currently being pursued at IIT, Delhi under the
joint sponsorship of DST and MOP.
- A number of requests to each other for reprints of technical material
were serviced.
Student-Level Training/Interaction
- 5 M.Tech students of IIT, Delhi carried out their summer training at
CEERI in the area of Power Electronics.
- 14 M.Tech students of IIT, Delhi underwent a 3-week training
on MOS IC Fabrication Process Technology at CEERI. The students were
also given lectures on unit processes of MOS IC fabrication technology
and selected topics on VLSI design by CEERI scientists.
APPENDIX I
Areas of Co-operation for 1994-95
Microelectronics Area
- Fault Diagnosis and Fault Tolerant Design.
- Semiconductor Device Modeling and Reliability.
- Design and Fabrication of Test Chips.
- High Level Synthesis and Design of Microprocessor Architectures.
- Design of High Speed Logic Cells/Analog and Mixed A/D Circuits.
- Fuzzy Logic and Neural Networks.
- Thin Films.
Power Electronics Area
- ASIC and Gate-Array Implementation of Power Electronics Circuits.
- PWM Techniques and Their Applications.
- Position and Velocity Control Techniques in DC Drives.
Microprocessor Applications and Control Area
- Microprocessor Control of Process Industries.
- Microprocessor Applications.
Areas of Co-operation for 1995-96
Microelectronics Area
- Fault Diagnosis and Fault Tolerant Design.
- Semiconductor Device Modeling and Reliability.
- Design and Fabrication of Test Chips.
- High Level Synthesis and Design of Microprocessor Architectures.
- Design of High Speed Logic Cells and Analog and Mixed A/D Circuits.
- Fuzzy Logic and Neural Networks.
- Thin Films.
- Fibre Pigtailing.
Power Electronics and Control Area
- ASIC and Gate Array Implementation of Power Electronics Circuits.
- PWM Techniques and Their Applications Including Microprocessors.
- Position and Velocity Control Techniques in DC Drives.
- Modeling and Analysis of Control of Complex Plants.
- Field Bus Concepts of Networking.
Areas of Co-operation for 1996-97
Microelectronics Area
- Semiconductor Device Modeling and Reliability.
- High Level Synthesis and Design of Microprocessor Architectures.
- Cell-Level Designs.
- Mixed Signal Designs.
- Fuzzy Logic and Neural Networks.
- Fibre Pigtailing.
Power Electronics and Related Areas
- ASIC and Gate Array Compilation of Power Electronics Circuits.
- PWM Techniques and Their Applications Including Microprocessors.
- Switched Reluctance Motors and Drives.
- Modeling and Analysis of Complex Plants.
APPENDIX II
Co-ordination Committee for 1994-95
- Prof. B. C. Nakra (Director, IIT Delhi)
- Prof. R. N. Biswas (Director, CEERI)
- Prof. D. Nagchoudhuri (Co-ordinator, IIT, Delhi side)
- Dr. Chandra Shekhar (Co-ordinator, CEERI side)
- Prof. C. M. Bhatia (Department of Electrical Engineering, IIT, Delhi)
- Sh. Rahul Verma (Industrial Electronics Group, CEERI)
Co-ordination Committee for 1995-96 and 1996-97
- Prof. V. S. Raju (Director, IIT, Delhi)
- Prof. R. N. Biswas (Director, CEERI)
- Prof. D. Nagchoudhuri (Co-ordinator, IIT, Delhi side)
- Dr. Chandra Shekhar (Co-ordinator, CEERI side)
- Prof. C. M. Bhatia (Department of Electrical Engineering, IIT, Delhi)
- Sh. Rahul Verma (Industrial Electronics Group, CEERI)
APPENDIX III
1994-95
| Technical Sub-committee for Microelectronics
|
|---|
| IIT, Delhi | CEERI, Pilani
|
|---|
| 1. | Prof. D. Nagchoudhuri | 1. | Dr. Chandra Shekhar
|
| 2. | Dr. G. S. Visweswaran | 2. | Sh. D. P. Runthala
|
| 3. | Dr. Sheel Aditya | 3. | Dr. P. Suryanarayana
|
| Technical Sub-committee for Control and Power Electronics
|
|---|
| IIT, Delhi | CEERI, Pilani
|
|---|
| 1. | Prof. C. M. Bhatia | 1. | Sh. Rahul Verma
|
| 2. | Dr. S. S. Murthy | 2. | Sh. V. N. Waliwadekar
|
| 3. | Prof. Madan Gopal | 3. | Sh. K. C. S. Murthy
|
1995-96
| Technical Sub-committee for Microelectronics
|
|---|
| IIT, Delhi | CEERI, Pilani
|
|---|
| 1. | Prof. D. Nagchoudhuri | 1. | Dr. Chandra Shekhar
|
| 2. | Dr. G. S. Visweswaran | 2. | Sh. D. P. Runthala
|
| 3. | Dr. Sheel Aditya | 3. | Dr. O. P. Daga
|
| Technical Sub-committee for Control and Power Electronics
|
|---|
| IIT, Delhi | CEERI, Pilani
|
|---|
| 1. | Prof. C. M. Bhatia | 1. | Sh. Rahul Verma
|
| 2. | Dr. S. S. Murthy | 2. | Sh. K. C. S. Murthy
|
| 3. | Dr. R. K. P. Bhatt | 3. | Dr. P. Bhanuprasad
|
1996-97
| Technical Sub-committee for Microelectronics
|
|---|
| IIT, Delhi | CEERI, Pilani
|
|---|
| 1. | Prof. D. Nagchoudhuri | 1. | Dr. Chandra Shekhar
|
| 2. | Dr. G. S. Visweswaran | 2. | Sh. D. P. Runthala
|
| 3. | Dr. M. Jagadesh Kumar | 3. | Dr. V. K. Khanna
|
| Technical Sub-committee for Control and Power Electronics
|
|---|
| IIT, Delhi | CEERI, Pilani
|
|---|
| 1. | Prof. C. M. Bhatia | 1. | Sh. Rahul Verma
|
| 2. | Dr. S. S. Murthy | 2. | Sh. V. N. Waliwadekar
|
| 3. | Dr. R. K. P. Bhatt | 3. | Dr. P. Bhanuprasad
|
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Updated : August 7, 1997
Created : July 25, 1997