Team Members of CEERI's IC Design Group


The IC design group's team has 9 R&D engineers/scientists. Among themselves, they cover expertise in various aspects of VLSI design including FPGA, gate array, standard cell, full custom and VHDL as well as Verilog based design methodologies.

Expertise also exists in CMOS analog and mixed-signal design, EDA and CAD tools, as well as semiconductor device modeling and simulation.


  1. Raj Singh is the current Group Leader and the group's contact point. He is the coordinator under SMDP-II sponsored project of DIT/MCIT and activity coordinator under CSIR-Supra project at CEERI.

    He is also coordinator for AcSIR-related MTech and PhD programmes at CEERI. Additionally, he coordinates the MTech (Mechatronics) programme under CSIR-BESU MoU.

    He is also the nodal officer for ICT infrastructure (LAN and Internet) for CEERI.

    He is the local guru on system administration, EDA tools, and various public-domain packages (TeX/LaTeX, xfig, gnuplot, ...) as well as Linux.

    He is also the general guru on information about a variety of technical topics as well as other useful data (roads and places in Delhi, local trains in Mumbai, affordable places for shopping in Jaipur, which route to take when driving from Pilani to Chandigarh, and such stuff).

    As an adjunct faculty member at BITS, he taught the "CAD for IC Design" course at BITS, Pilani in the second semester during 1990-2002 period. He has partly taught the course on "System Specification and Modeling" in 2005-06.

    He is an adjunct faculty member at BESU and taught full-semester course on "HDL-based FPGA Design" to MTech students.

    He currently teaches full-semester courses related to "Technical Commincations" and "Project Management" to AcSIR MTech/PhD students.

  2. Dr. A. S. Mandal has research interests in Processor Design, Image Processing, and Computer Vision. His latest passion is "Perception Engineering" and "Cognitive Science".

    He is the project leader of a DIT/MCIT sponsored multi-institutional project related to perception engineering. He recently completed a DIT/MCIT sponsored project related to smart camera (jointly with IIT-Delhi).

    He presently teaches the full-semester course on "Advanced VLSI Architectures" to AcSIR MTech students.

  3. Dr. S. C. Bose is presently looking at low-power design issues, CMOS analog and mixed-signal design.

    He is the project leader of a DIT/MCIT sponsored project related to mixed-signal design.

    He taught the "CMOS Analog IC Design" course at BITS, Pilani in the second semester for many years. He also looked after the teaching and the lab for the "VLSI Design" course in the first semester at various times.

    He presently teaches "Mixed-Signal Design" course at BITS, Pilani as well as a full-semester course on "CMOS Analog Design" to AcSIR MTech students.

  4. Sudhir Kumar is the local guru on VHDL, FPGA design, system design and synthesis tools.

  5. Dr. A. Karmakar is usually found busy learning new techniques, CAD tools or UNIX commands or discussing English/Hindi/Bangla Grammar.

    He is the local guru on all aspects of signal processing.

    He presently teaches the full-semester course on "CMOS Digital VLSI Design" to AcSIR MTech students.

    He looked after the lab component for the "VLSI Design" course as well as the "CMOS Analog IC Design" course at BITS, Pilani for many years.

  6. Anil Kumar Saini works in the area of mixed-signal design. Also check his home page for more information.

  7. Jai Gopal Pandey explores the area of digital design and and is keen on reconfigurable computing.

  8. Ravi Saini is interested in HDLs and VLSI architectures.

  9. G. Rajahari has keen research interest in mixed-signal design and low-power CMOS analog design.

Some Past Team Members of CEERI's IC Design Group

  1. Dr. Chandra Shekhar is now the Director of CEERI, Pilani. He is the past Group Leader.

  2. Dr. Virendra Singh left us to join SERC, IISc, Bangalore where he continues to puruse his interest in VLSI Testing.

  3. Dr. K. S. Yadav is at Noida.

  4. Dr. Arti Noor was with us for a number of years and then moved to the Speech Technology Group at CEERI, Delhi Centre. She is now with C-DAC, Noida.

  5. Dr. Swaraj Srivastava took voluntary retirement in May, 2003. She was at Hyderabad since then. She has now moved to Dehradun.

  6. Ms. Alpana Agrawal is now with Thapar University, Patiala and a popular teacher of microelectronics-related courses.

  7. Dr. G. K. Sharma is a Professor with ABVIITM, Gwalior.

  8. Dr. B. P. Mathur and Mr. K. Prabakaran are now in the USA.

  9. Mr. K. V. S. H. Rao after his retirement has moved to his home town of Bapatla in Andhra Pradesh.


Current Activities | Future Plans | Past Activities | Facilities
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Contact Raj Singh for any suggestions or problems.

Updated : March 18, 2011
Created : July 25, 1997


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